User Contributed MET/CAL PROCEDURE ============================================================================= INSTRUMENT: TEK CDM250 CAL VER DATE: 03-Dec-97 AUTHOR: User Contributed REVISION: 1.00 ADJUSTMENT THRESHOLD: 70% NUMBER OF TESTS: 42 NUMBER OF LINES: 454 CONFIGURATION: Fluke 5500A ============================================================================= STEP FSC RANGE NOMINAL TOLERANCE MOD1 MOD2 3 4 CON # Source: Tektronix CDM250 Preformance/Vefication 16May97 Revision A # Revision Info: # Original Prepared: 1Dec97 # Rev 1.00 (1Dec97) Received procedure from Tektronix,incorporated into # Met-Cal Ver 4.2 # Subprocedures: # None # # System Specifications: # TUR calculation is based on specification interval of the accuracy file. # The default 5500A accuracy file contains 90 day specs. # # 1.001 ASK- P F V 1.002 ASK+ K 1.003 HEAD PRELIMINARY INSTRUCTIONS 1.004 DISP [32] -----> WARNING <----- 1.004 DISP 1.004 DISP [32]>> HIGH VOLTAGE << is used or exposed during the 1.004 DISP [32]performance of this calibration.>>DEATH ON CONTACT<< 1.004 DISP [32]may result if personnel fail to observe 1.004 DISP [32]safety precautions. 1.004 DISP # 1.005 5500 * S 1.006 HEAD INITIAL SETUP 1.007 DISP [32]Connect the 5500A to the UUT as follows: 1.007 DISP 1.007 DISP [32] 5500 UUT 1.007 DISP [32] 1.007 DISP [32] NORMAL HI 0-------->0 V/ê 1.007 DISP [32] NORMAL LO 0-------->0 COM 1.007 DISP 1.007 DISP [32] Set the UUT to DC 200m. 1.008 HEAD {DC VOLTAGE TESTS} 1.009 5500 180mV 1U 2W #! Test Tol 0.001, Sys Tol 1.2e-005, TUR 83.3333 (>= 4.00). 2.001 DISP [32]! ! 2.001 DISP 2.001 DISP 2.001 DISP [32] ----> Set Range to 2V <---- 2.001 DISP 2.001 DISP 2.001 DISP [32]! ! 2.002 5500 1.80V 0.01U 2W #! Test Tol 0.01, Sys Tol 7.7e-005, TUR 129.870 (>= 4.00). 3.001 DISP [32]! ! 3.001 DISP 3.001 DISP 3.001 DISP [32] ----> Set Range to 20V <---- 3.001 DISP 3.001 DISP 3.001 DISP [32]! ! 3.002 5500 18.0V 0.1U 2W #! Test Tol 0.1, Sys Tol 0.00077, TUR 129.870 (>= 4.00). 4.001 DISP [32] -----> WARNING <----- 4.001 DISP 4.001 DISP [32]>> HIGH VOLTAGE << is used or exposed during the 4.001 DISP [32]performance of this calibration.>>DEATH ON CONTACT<< 4.001 DISP [32]may result if personnel fail to observe 4.001 DISP [32]safety precautions. 4.001 DISP 4.002 DISP [32]! ! 4.002 DISP 4.002 DISP 4.002 DISP [32] ----> Set Range to 200V <---- 4.002 DISP 4.002 DISP 4.002 DISP [32]! ! 4.003 5500 180.0V 1.0U 2W #! Test Tol 1, Sys Tol 0.0086, TUR 116.279 (>= 4.00). 5.001 DISP [32]! ! 5.001 DISP 5.001 DISP 5.001 DISP [32] ----> Set Range to 500V <---- 5.001 DISP 5.001 DISP 5.001 DISP [32]! ! 5.002 5500 480.0V 4.0U 2W #! Test Tol 4, Sys Tol 0.0231, TUR 173.160 (>= 4.00). 6.001 5500 * S # # 6.002 HEAD {AC VOLTAGE TESTS} 6.003 DISP 6.003 DISP [32]! ----> AC VOLTAGE RANGE <---- 6.003 DISP 6.003 DISP 6.003 DISP [32] ----> Set Range to 200mV AC <---- 6.003 DISP 6.003 DISP 6.003 DISP [32]! ! 6.004 5500 180mV 22U 50H SI 2W #! Test Tol 0.022, Sys Tol 9.2e-005, TUR 239.130 (>= 4.00). 7.001 5500 180mV 22U 100H SI 2W #! Test Tol 0.022, Sys Tol 9.2e-005, TUR 239.130 (>= 4.00). 8.001 5500 180mV 22U 500H SI 2W #! Test Tol 0.022, Sys Tol 9.2e-005, TUR 239.130 (>= 4.00). 9.001 DISP [32]! ! 9.001 DISP 9.001 DISP 9.001 DISP [32] ----> Set Range to 2V <---- 9.001 DISP 9.001 DISP 9.001 DISP [32]! ! 9.002 5500 1.80V 0.022U 50H SI 2W #! Test Tol 0.022, Sys Tol 0.00042, TUR 52.3810 (>= 4.00). 10.001 5500 1.80V 0.022U 100H SI 2W #! Test Tol 0.022, Sys Tol 0.00042, TUR 52.3810 (>= 4.00). 11.001 5500 1.80V 0.022U 500H SI 2W #! Test Tol 0.022, Sys Tol 0.00042, TUR 52.3810 (>= 4.00). 12.001 DISP [32]! ! 12.001 DISP 12.001 DISP 12.001 DISP [32] ----> Set Range to 20V <---- 12.001 DISP 12.001 DISP 12.001 DISP [32]! ! 12.002 5500 18.0V 0.22U 50H SI 2W #! Test Tol 0.22, Sys Tol 0.006, TUR 36.6667 (>= 4.00). 13.001 5500 18.0V 0.22U 100H SI 2W #! Test Tol 0.22, Sys Tol 0.006, TUR 36.6667 (>= 4.00). 14.001 5500 18.0V 0.22U 500H SI 2W #! Test Tol 0.22, Sys Tol 0.006, TUR 36.6667 (>= 4.00). 15.001 DISP [32] -----> WARNING <----- 15.001 DISP 15.001 DISP [32]>> HIGH VOLTAGE << is used or exposed during the 15.001 DISP [32]performance of this calibration.>>DEATH ON CONTACT<< 15.001 DISP [32]may result if personnel fail to observe 15.001 DISP [32]safety precautions. 15.001 DISP 15.002 DISP [32]! ! 15.002 DISP 15.002 DISP 15.002 DISP [32] ----> Set Range to 200V <---- 15.002 DISP 15.002 DISP 15.002 DISP [32]! ! 15.003 5500 180.0V 02.2U 50H SI 2W #! Test Tol 2.2, Sys Tol 0.0786, TUR 27.9898 (>= 4.00). 16.001 5500 180.0V 02.2U 100H SI 2W #! Test Tol 2.2, Sys Tol 0.0786, TUR 27.9898 (>= 4.00). 17.001 5500 180.0V 02.2U 500H SI 2W #! Test Tol 2.2, Sys Tol 0.0786, TUR 27.9898 (>= 4.00). 18.001 DISP [32]! ! 18.001 DISP 18.001 DISP 18.001 DISP [32] ----> Set Range to 500V <---- 18.001 DISP 18.001 DISP 18.001 DISP [32]! ! 18.002 5500 480.0V 9.0U 50H SI 2W #! Test Tol 9, Sys Tol 0.272, TUR 33.0882 (>= 4.00). 19.001 5500 480.0V 9.0U 100H SI 2W #! Test Tol 9, Sys Tol 0.272, TUR 33.0882 (>= 4.00). 20.001 5500 480.0V 9.0U 500H SI 2W #! Test Tol 9, Sys Tol 0.272, TUR 33.0882 (>= 4.00). # 21.001 5500 * S 21.002 HEAD {DC LOW CURRENT TESTS} 21.003 HEAD { Display Check} 21.004 OPBR [32] 21.004 OPBR [32] Set the UUT to the 200uA DC Range. With no leads 21.004 OPBR [32] connected to the input does the Display indicate 21.004 OPBR [32] 21.004 OPBR [32] 21.004 OPBR [32] ---> 00.0 ñ .1 <--- 21.004 OPBR [32] 21.004 OPBR [32] 21.005 JMPF 22.002 21.006 MATH mem1=mem1*.01 21.007 MEMC A 1% 0.1U #! T.U.R. not calculated because System Uncertainty not available. 22.001 JMP 24.002 # 22.002 MATH mem1=0 22.003 OPBR [32] 22.003 OPBR [32] Press the Volts, Amps & Ohms buttons several time. 22.003 OPBR [32] 22.003 OPBR [32] Reconfigure UUT to the 200uA DC Range. Does the 22.003 OPBR [32] display indiacte 22.003 OPBR [32] 22.003 OPBR [32] ---> 00.0 ñ .1 <--- 22.003 OPBR [32] 22.004 JMPF 23.002 22.005 MATH mem1=mem1*.01 22.006 MEMC A 1% 0.1U #! T.U.R. not calculated because System Uncertainty not available. 23.001 JMP 24.002 # 23.002 DISP [32] 23.002 DISP [32] Unit failed display check. Repair as required 23.002 DISP [32] If UUT cannot be repaired process for removal 23.002 DISP [32] from system 23.002 DISP [32] 23.002 DISP [32] 23.002 DISP [32] 23.003 MATH mem1=(mem1*-1)*.101 23.004 MEMC A 1% 0.1U #! T.U.R. not calculated because System Uncertainty not available. 24.001 JMP 42.001 # 24.002 DISP [32]Connect the 5500A to the UUT as follows: 24.002 DISP [32] 24.002 DISP [32] 5500 UUT 24.002 DISP [32] 24.002 DISP [32] AUX HI 0-------->0 A 24.002 DISP [32] AUX LO 0-------->0 COM 24.002 DISP 24.002 DISP [32] Set the UUT to 200u ADC. # 24.003 HEAD DC CURRENT TESTS: {200uA Range} 24.004 5500 180uA 1.9U 2W #! Test Tol 1.9e-006, Sys Tol 6.8e-008, TUR 27.9412 (>= 4.00). # 25.001 HEAD DC CURRENT TESTS: {2mA Range} 25.002 DISP [32]! ! 25.002 DISP 25.002 DISP 25.002 DISP [32] ----> Set Range to 2m ADC <---- 25.002 DISP 25.002 DISP 25.002 DISP [32]! ! 25.003 5500 1.8mA 0.19U 2W #! Test Tol 0.00019, Sys Tol 2.3e-007, TUR 826.087 (>= 4.00). # 26.001 HEAD DC CURRENT TESTS: {20mA Range} 26.002 DISP [32]! ! 26.002 DISP 26.002 DISP 26.002 DISP [32] ----> Set Range to 20m ADC <---- 26.002 DISP 26.002 DISP 26.002 DISP [32]! ! 26.003 5500 18.0mA 0.19U 2W #! Test Tol 0.00019, Sys Tol 1.69e-006, TUR 112.426 (>= 4.00). # 27.001 HEAD DC CURRENT TESTS: {200mA Range} 27.002 DISP [32]! ! 27.002 DISP 27.002 DISP 27.002 DISP [32] ----> Set Range to 200m ADC <---- 27.002 DISP 27.002 DISP 27.002 DISP [32]! ! 27.003 5500 180.0mA 1.9U 2W #! Test Tol 0.0019, Sys Tol 1.77e-005, TUR 107.345 (>= 4.00). # 28.001 HEAD DC CURRENT TESTS: {2000mA Range} 28.002 DISP [32]! ! 28.002 DISP 28.002 DISP 28.002 DISP [32] ----> Set Range to 2000m ADC <---- 28.002 DISP 28.002 DISP 28.002 DISP [32]! ! 28.003 5500 1800.0mA 21U 2W #! Test Tol 0.021, Sys Tol 0.000458, TUR 45.8515 (>= 4.00). 29.001 5500 * S # 29.002 HEAD DC CURRENT TESTS: {HI CURRENT} 29.003 HEAD [32] : {10A Range} 29.004 DISP [32]Connect the 5500A to the UUT as follows: 29.004 DISP 29.004 DISP [32] 5500 UUT 29.004 DISP [32] 29.004 DISP [32] AUX HI 0-------->0 10A 29.004 DISP [32] AUX LO 0-------->0 COM 29.004 DISP 29.004 DISP [32] Set the UUT to 10 ADC. 29.005 5500 1.999A 0.05U 2W #! Test Tol 0.05, Sys Tol 0.00050377, TUR 99.2516 (>= 4.00). # 30.001 HEAD {AC LOW CURRENT TESTS} # 30.002 DISP [32]Connect the 5500A to the UUT as follows: 30.002 DISP [32] 30.002 DISP [32] 5500 UUT 30.002 DISP [32] 30.002 DISP [32] AUX HI 0-------->0 A 30.002 DISP [32] AUX LO 0-------->0 COM 30.002 DISP 30.002 DISP [32] Set the UUT to 200u AAC. # 30.003 HEAD AC CURRENT TESTS: {200uA Range} 30.004 5500 180uA 3.1U 100H SI 2W #! Test Tol 3.1e-006, Sys Tol 4.12e-007, TUR 7.5243 (>= 4.00). # 31.001 HEAD AC CURRENT TESTS: {2mA Range} 31.002 DISP [32]! ! 31.002 DISP 31.002 DISP 31.002 DISP [32] ----> Set Range to 2m AAC <---- 31.002 DISP 31.002 DISP 31.002 DISP [32]! ! 31.003 5500 1.800mA 0.031U 100H SI 2W #! Test Tol 3.1e-005, Sys Tol 1.74e-006, TUR 17.8161 (>= 4.00). # 32.001 HEAD AC CURRENT TESTS: {20mA Range} 32.002 DISP [32]! ! 32.002 DISP 32.002 DISP 32.002 DISP [32] ----> Set Range to 20m AAC <---- 32.002 DISP 32.002 DISP 32.002 DISP [32]! ! 32.003 5500 18.00mA 0.31U 100H SI 2W #! Test Tol 0.00031, Sys Tol 1.56e-005, TUR 19.8718 (>= 4.00). # 33.001 HEAD AC CURRENT TESTS: {200mA Range} 33.002 DISP [32]! ! 33.002 DISP 33.002 DISP 33.002 DISP [32] ----> Set Range to 200m AAC <---- 33.002 DISP 33.002 DISP 33.002 DISP [32]! ! 33.003 5500 180.0mA 3.1U 100H SI 2W #! Test Tol 0.0031, Sys Tol 0.000156, TUR 19.8718 (>= 4.00). # 34.001 HEAD AC CURRENT TESTS: {2000mA Range} 34.002 DISP [32]! ! 34.002 DISP 34.002 DISP 34.002 DISP [32] ----> Set Range to 2000m AAC <---- 34.002 DISP 34.002 DISP 34.002 DISP [32]! ! 34.003 5500 1800mA 31U 100H SI 2W #! Test Tol 0.031, Sys Tol 0.00174, TUR 17.8161 (>= 4.00). # 35.001 HEAD AC CURRENT TESTS: {HI CURRENT} 35.002 HEAD [32] : {10A Range} 35.003 DISP [32]Connect the 5500A to the UUT as follows: 35.003 DISP 35.003 DISP [32] 5500 UUT 35.003 DISP [32] 35.003 DISP [32] AUX HI 0-------->0 10A 35.003 DISP [32] AUX LO 0-------->0 COM 35.003 DISP 35.003 DISP [32] Set the UUT to 10 AAC. 35.004 5500 1.999A 0.07U 100H SI 2W #! Test Tol 0.07, Sys Tol 0.0018992, TUR 36.8576 (>= 4.00). # 36.001 HEAD {RESISTANCE TESTS} 36.002 DISP [32]Connect the 5500A to the UUT as follows: 36.002 DISP 36.002 DISP [32] 5500 UUT 36.002 DISP [32] 36.002 DISP [32] NORMAL HI 0-------->0 V/ê 36.002 DISP [32] NORMAL LO 0-------->0 COM 36.002 DISP 36.002 DISP [32] Set the UUT to 200ê. # 36.003 HEAD RESISTANCE TESTS: {200 ê Range} 36.004 5500 180.0Z 1.8U 2W #! Test Tol 1.8, Sys Tol 0.0276, TUR 65.2174 (>= 4.00). 37.001 HEAD RESISTANCE TESTS: {2 kê Range} 37.002 DISP [32]! ! 37.002 DISP 37.002 DISP 37.002 DISP [32] ----> Set Range to 2kê <---- 37.002 DISP 37.002 DISP 37.002 DISP [32]! ! 37.003 5500 1.8kZ 0.15U 2W #! Test Tol 150, Sys Tol 0.186, TUR 806.452 (>= 4.00). 38.001 HEAD RESISTANCE TESTS: {20 kOhm Range} 38.002 DISP [32]! ! 38.002 DISP 38.002 DISP 38.002 DISP [32] ----> Set Range to 20kê <---- 38.002 DISP 38.002 DISP 38.002 DISP [32]! ! 38.003 5500 18kZ 0.15U 2W #! Test Tol 150, Sys Tol 1.86, TUR 80.6452 (>= 4.00). 39.001 HEAD RESISTANCE TESTS: {200 kOhm Range} 39.002 DISP [32]! ! 39.002 DISP 39.002 DISP 39.002 DISP [32] ----> Set Range to 200kê <---- 39.002 DISP 39.002 DISP 39.002 DISP [32]! ! 39.003 5500 180.0kZ 01.5U 2W #! Test Tol 1500, Sys Tol 22.2, TUR 67.5676 (>= 4.00). 40.001 HEAD RESISTANCE TESTS: {2000 kOhm Range} 40.002 DISP [32]! ! 40.002 DISP 40.002 DISP 40.002 DISP [32] ----> Set Range to 2000kê <---- 40.002 DISP 40.002 DISP 40.002 DISP [32]! ! 40.003 5500 1800kZ 15U 2W #! Test Tol 15000, Sys Tol 253, TUR 59.2885 (>= 4.00). 41.001 HEAD RESISTANCE TESTS: {20 MOhm Range} 41.002 DISP [32]! ! 41.002 DISP 41.002 DISP 41.002 DISP [32] ----> Set Range to 20Mê <---- 41.002 DISP 41.002 DISP 41.002 DISP [32]! ! 41.003 5500 11.0MZ 0.22U 2W #! Test Tol 2.2e+005, Sys Tol 8800, TUR 25.0000 (>= 4.00). # #END # 42.001 DISP [32] <<<<<< FAILURE INFO >>>>>>>> 42.001 DISP [32] If the UUT failed any portion of this procedure 42.001 DISP [32] save results in an "As-Found" file and 42.001 DISP [32] Repair/Adjust in accordance with manufacturer's 42.001 DISP [32] or GIDEP procedures and recalibrate. When 42.001 DISP [32] recalibration is complete save results "As-Left" 42.001 DISP [32] If Repair/Adjustment is unsuccessful process for 42.001 DISP [32] Rejection in accordance with current instructions. 42.002 HEAD 42.003 DISP <<<<<< C A L I B R A T I O N C O M P L E T E >>>>>> 42.003 DISP 1. Disconnect UUT From Standards and secure cables. 42.003 DISP 2. Insure UUT is turned off or in Transport position 42.003 DISP ...if appiable. 42.003 DISP 3. Complete Documentation to include labeling, sealing 42.003 DISP ...Data sheet preparation and work order close out IAW 42.003 DISP ...AC-1-001. 42.004 DISP 42.004 DISP [32] <<<<< End of Procedure. >>>>> 42.004 DISP 42.005 END #! T.U.R.s less than 4.00: 0 #! T.U.R.s estimated using RANGE value: 0 #! T.U.R.s not calculated (ASK- U): 0 #! T.U.R.s not computable at compile time: 3 #! FOR JUSTIFICATION REFER TO COMMENTS FOLLOWING EACH TEST IN THIS LISTING.